1. Field of the Invention
This invention relates to a plasma display, and more particularly to a plasma display that is adaptive for causing a stable discharge at all lines as well as eliminating a side abnormal discharge.
2. Description of the Related Art
Generally, a plasma display radiates a phosphorous material using an ultraviolet ray with a wavelength of 147 nm generated upon discharge of an inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe, to thereby display a picture including characters and graphics. Such a PDP is easy to be made into a thin-film and large-dimension type. Moreover, the PDP provides a very improved picture quality owing to a recent technical development. Particularly, since a three-electrode, alternating current (AC) surface-discharge PDP has wall charges accumulated in the surface thereof upon discharge and protects electrodes from a sputtering generated by the discharge, it has advantages of a low-voltage driving and a long life.
FIG. 1 is a perspective view showing a cell structure of a conventional plasma display.
Referring to FIG. 1, a discharge cell of the conventional three-electrode, AC surface-discharge PDP includes a scan electrode Y and a sustain electrode Z provided on an upper substrate 10, and an address electrode X provided on a lower substrate 18. The scan electrode Y and the sustain electrode Z include transparent electrodes 12Y and 12Z, and metal bus electrodes 13Y and 13Z having a smaller line width than the transparent electrodes 12Y and 12Z and provided at one edge of the transparent electrodes 12Y and 12Z, respectively.
The transparent electrodes 12Y and 12Z are usually formed from indium-tin-oxide (ITO) on the upper substrate 10. The metal bus electrodes 13Y and 13Z are usually formed from a metal such as chrome (Cr) on the transparent electrodes 12Y and 12Z to thereby reduce a voltage drop caused by the transparent electrodes 12Y and 12Z having a high resistance. On the upper substrate 10 provided with the scan electrode Y and the sustain electrode Z in parallel, an upper dielectric layer 14 and a protective film 16 are disposed. Wall charges generated upon plasma discharge are accumulated into the upper dielectric layer 14. The protective film 16 prevents a damage of the upper dielectric layer 14 caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film 16 is usually made from magnesium oxide (MgO).
A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 provided with the address electrode X. The surfaces of the lower dielectric layer 22 and the barrier ribs 24 are coated with a phosphorous material layer 26. The address electrode X is formed in a direction crossing the scan electrode Y and the sustain electrode Z. The barrier rib 24 is formed in a stripe or lattice shape to thereby prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent cells. The phosphorous material layer 26 is excited by an ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. An inactive mixture gas is injected into a discharge space defined between the upper and lower substrate 10 and 18 and the barrier rib 24.
Such a PDP makes a time-divisional driving of one frame, which is divided into various sub-fields having a different discharge frequency, so as to express gray levels of a picture. Each sub-field is again divided into a reset period for initializing the entire field, an address period for selecting a scan line and selecting a cell from the selected scan line and a sustain period for realizing the gray levels depending on the discharge frequency. Herein, one scan line includes cells arranged on one line. The cells included in one scan line are scanned by the same scan pulse to simultaneously apply data voltages.
For instance, when it is intended to display a picture of 256 gray levels, a frame interval equal to 1/60 second (i.e. 16.67 msec) is divided into 8 sub-fields SF1 to SF8 as shown in FIG. 2. Each of the 8 sub-fields SF1 to SF8 is divided into a reset period, an address period and a sustain period as mentioned above. Herein, the reset period and the address period of each sub-field are equal every sub-field, whereas the sustain period are increased at a ratio of 2n (wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field.
In such a PDP, as shown in FIG. 3A and FIG. 3B, scanning pulses are applied to scan lines sequentially for each line along a specific scanning direction. In other words, the PDP selects cells to be turned on by an address discharge between scanning pulses sequentially applied to the scan electrodes Y and data pulses uniformly applied to the address electrodes X.
However, such a PDP has a problem in that an unstable address discharge is generated at the first scan electrode Y1 or Ym in the scanning direction. More specifically, the remaining scan lines other than a scan line scanned by the first scanning pulse (hereinafter referred to as “first scan line”) are supplied with priming charged particles generated by an address discharge at the previous scan line. Thus, the cells at the remaining scan lines other than the first scan line makes use of a priming effect caused by the priming charged particles to thereby cause a stable discharge. However, since the first scan line generates a discharge only by an external voltage without a priming effect caused by the priming charged particles, it causes a more unstable discharge than other scan lines. As a result, the cells at the first scan line causes an unstable address discharge, and causes an unstable sustain discharge because wall charges within the cells generated by the address discharge are small. Due to such a first scan line, it becomes difficult to assure a voltage margin. For instance, the same voltage is applied to the first scan line and other scan lines, then there occurs a phenomenon in which the cell is turned on/off without being turned on at the first scan line unlike other scan lines.
In order to stabilize a discharge at the first scan line, a discharge voltage applied to the first scan line may be raised. However, in this case, power consumption is increased and a voltage margin becomes insufficient due to a rise of the discharge voltage.
In a single scan scheme as shown in FIG. 3A and FIG. 3B, it is difficult to increase the number of sub-fields for the purpose of corresponding to a high resolution of the PDP and improving a picture quality. This is because, if the number of scan lines is more increased or the number of sub-fields is more added as the PDP goes a higher resolution, an address period is lengthened to cause a difficult assurance of the sustain period. In order to overcome a limit of such a single scan scheme, there has been developed a dual scan scheme as shown in FIG. 4A and FIG. 4B. In the dual scan scheme, as shown in FIG. 4A and FIG. 4B, the PDP is divided into two parts of an upper half 30 and a lower half 32 to make a simultaneous scanning on a line-by-line basis at the upper half 30 and the lower half 32, thereby reducing an address period. Each of the upper half 30 and the lower half 32 includes n/2 scan lines when it is assumed that scan lines of the PDP should be n.
However, the dual scan scheme as shown in FIG. 4A and FIG. 4B also has a problem in that an unstable discharge is generated at the first scan line like the single scan scheme. In other words, the PDP adopting the dual scan scheme also cannot use the priming effect at the first scan line unlike other scan lines.
Meanwhile, as shown in FIG. 5 and FIG. 6, a discharge space having the same structure as the cell at a display area 31 is defined at each of the upper outside and the lower outside of the display area 31 including n scan lines. In other words, an upper non-display area 32 and a lower non-display area 33 are provided with address electrodes X and dummy electrode pairs UD1, UD2, BD1 and BD2 and is provided with a dielectric layer covering the electrodes X, UD1, UD2, BD1 and BD2. The dummy electrodes UD1, UD2, BD1 and BD2 provided at the upper non-display area 32 and the lower non-display area 33 cause a discharge at the non-display area during the aging process, thereby stabilizing a discharge characteristic of the cells at the first scan line and the nth scan line of the display area 31 under the same condition as other cells of the display area 31. To this end, the dummy electrodes UD1, UD2, BD1 and BD2 are supplied with a voltage capable of causing a discharge during the aging process. However, there is raised a problem in that the cells of the upper non-display area 32 and the lower non-display area 33 forces the PDP to cause a side abnormal discharge. Such a side abnormal discharge is a discharge generated at the non-display areas 32 and 33 accidentally.
A cause of the side abnormal discharge is as follows. If a discharge is generated within the cells upon driving of the PDP, then space electric charges 61 and 62 caused by the discharge are moved into the upper non-display area 32 and the lower non-display area 33 as shown in FIG. 6, to thereby accumulate the electric charges onto the dielectric layer provided at the cells of the non-display areas 32 and 33. When a wall voltage 62 caused by the electric charges accumulated onto the non-display areas 32 and 33 is raised into more than a discharge voltage Vf capable of causing a discharge, a side abnormal discharge is generated among the electrodes X, UD1, UD2, BD1 and BD2 within the non-display areas 32 and 33. If such a side abnormal discharge occurs at the non-display areas 32 and 33, then a visible light 81 emitted due to the discharge is diffused into the edge of the display area 31 as shown in FIG. 7 to thereby deteriorate a display quality.